| Wednesday, September 4 |
| Time |
CBSE |
SPPI |
MMT |
8:30-9:00 [Hall 6] | Opening Session Picture
1
2
3
4
5
|
9:00-10:30 [Hall 6] |
Keynote1 MMT
DriveBy InfoFueling - Telematics beyond the Anytime Anywhere Paradigm
Wieland Holfelder
(Daimler Chrysler Research and Technology North America, Smart Vehicles Group) |
| 10:30-11:00 | Coffee |
11:00-12:30 [Hall 1|2|3] |
S1: Component Models
Chairman: Veikko Seppänen |
S1: Support for Collaborative Processes
Chairman: Gerhard Chroust |
S1: Image Processing Chairman: Otto Anshus |
| 11:00 |
Local Components and Reuse of Legacy Code in the CORBA Component Model
E. Teiniker, S. Mittendorfer, C. Kreiner, Z. Kovács and R. Weiss |
Process Awareness for Distributed Software Deve- lopment in Virtual Teams
S. Dustdar and H. Gall |
Memory Conscious 3D Wavelet Transform
G. Bernabé, J. González, J. Garcia and J. Duato |
| 11:30 |
AspectCCM: An Aspect-Oriented Extension of The CORBA Component Model
P. Clemente, J. Hernández, J. Murillo, M. Pérez and F. Sánchez |
A Groupware-Supported Inspection Process for Active Inspection Management
M. Halling, S. Biffl and P. Grünbacher |
Dynamic Task Scheduling with Speculative Approach and Its Application to Image Segmentation A. Wakatani |
| 12:00 |
Comparing JavaBeans and OSGi towards an Integration of Two Complementary Component Models
H. Cervantes and J. Favre |
Introducing a GSS-Based Negotiation Approach at TACOM
D. Turnas, P. Kloska and M. Saboe |
Line to Form to Line - Transformations between 2D and 3D in Design and Documentation
R. Newman, M. Tovey, C. Porter and N. Bussard |
| 12:30-14:00 | Lunch |
14:00-15:30 [Hall 6] |
Keynote1 DSD
Systems Are Made from Transistors: UDSM Technology Creates New Challenges for Library and IC Development
Ulf Schlichtmann (Infineon)
System Design Challenges at Nokia
Klaus Kronlöf (Nokia) |
| 15:30-15:45 |
Break |
15:45-17:15 [Hall 1|2|3] |
S2: Component Compositions
Chairman: Jacky Estublier |
S2: SPPI Models and Methods
Chairman: Erwin Grosspietsch |
S2: Multimedia Server Issues
Chairman: Jörg Ottensmeyer |
| 15:45 |
Selecting Software Components with Multiple Interfaces
L. Iribarne, J. Troya and A. Vallecillo |
Combining Models for business Decisions and Software Development
C. Wallin, S. Larsson, F. Ekdahl and I. Crnkovic |
Advanced Indexing and Retrieval in Present-day Content Management Systems
T. Kunkelmann and R. Brunelli |
| 16:15 |
Evaluation of Static Properties for Component-Based Architectures
A. Fioukov, E. Eskenazi, D. Hammer and M. Chaudron |
Developing, Validating and Evolving an Approach to Product Line Benefit and Risk Assessment
K. Schmid and I. John |
Performance Tradeoffs for Static Allocation of Zero-Copy Buffers
P. Halvorsen, E. Jorde, K. Skevik, T. Plagemann and v. Goebel |
| 16:45 |
An Approach to Composition of EJB Components Using C2 Style
Y. Choi, O. Kwon and G. Shin |
Using Model Checking to Test a Firewall: A Case Study
P. Krishnan and D. Hartley |
Owl: A New Multimedia Data Splitting Scheme for Cluster Video Server
H. Jin and X. Liao |
| 17:15-17:45 |
Coffee |
17:45-19:45 [Hall 3] |
Work in Progress Session
Chairman: Erwin Grosspietsch, Konrad Klöckner |
| Thursday, September 5 |
8:30-10:00 [Hall 6] |
Keynote2 DSD
Networks or silicon: Blessing or Nightmare?
Paul Wielage (Philips Research)
Embedded Software: How To Make It Efficient?
Peter Marwedel (University of Dortmund) |
| 10:00-10:30 |
Coffee |
10:30-12:00 [Hall 1|2|3] |
S3: COTS and Case Studies
Chairman: Stig Larsson |
S3: Quality Aspects in Web Computing
Chairman: Konrad Klöckner |
10:30-11:30, S3: Learning Systems
Chairman: Marten van Sinderen |
| 10:30 |
Definition of a COTS Software Component Acquisition Process Framework: The Case of
a Telecommunications Company
P. Ulkuniemi and V. Seppänen |
E-Commerce Website Quality Evaluation
A. Albuquerque and A. Belchior |
Evolving Web-Based Delivery: Managing the Transition fomr VLE's Designed by
Academics to Commercial VLE's. The Post-Graduate Experience
R. McClelland |
| 11:00 |
Evolution of the Use and Risks of the Commercial Software Components
P. Kallio and T. Ihme |
Canceled |
JMFMoD: A New System for Media on Demand Presentations
A. Pajares, J, Guerri, A. Belda, J. Cermeño, C. Palau and M. Esteve |
| 11:30 |
Canceled |
Feasibilty Analysis for Web Project Engineering Encoded as Rule-Based Expert System
P. Gervás and J. Otero |
11:30-12:00, S4a: Multimedia Hardware
Chairman: Ivica Rimac
Multi-Decoder Digital Television Platform
M. Rostami, J. Tavares and A. Navarro |
| 12:00-13:30 |
Lunch |
13:30-15:00 [Hall 6] |
Keynote1 CBSE/SPPI
EC/IST Program Activities in Component Based Software Engineering
Jacques Bus (Head of Unit Technologies and Engineering for
Software, Systems and Services, DG Information Society, IST Programs, European Commission) |
| 15:00-15:15 |
Break |
15:15-16:45 [Hall 1|2|3] |
S4 (CBSE+SPPI): Software Process Improvement for CBSE
Chairman: Onur Demirörs |
S4b: Multimedia Hardware (cont.)
Chairman: Ivica Rimac |
| 15:15 |
Software Process Improvement for Component-Based Software Engineering: An
Introduction to the OOSPICE Project
F. Stallinger, A. Dorling, T. Rout, B. Henderson-Sellers and
B. Lefever |
Applications for the Highly Parallel Mobile Multimedia Modem M3-DSP
M. Hosemann, V. Nikolajevic, R. Nüssgen and G. Fettweis |
| 15:45 |
Bridging the Gap from Process Modelling to Process Assessment: The
OOSPICE Process Specification for Component-Based Software Engineering
B. Henderson-Sellers, F. Stallinger and B. Lefever |
A Sum of Absolute Differences Implementation in FPGA Hardware
S. Wong, S. Vassiliadis and S. Cotofana |
| 16:15 |
Assessing CBD - What's the Difference?
J. Torgersson and A. Dorling |
Hardware Implementation of the Subdivision Loop Algorithm
A. del Rio, M. Bóo, M. Amor and J. Bruguera | Picture 1
2 |
| 16:45-17:15 |
Coffee |
| 20:30-... |
Conference Dinner |
| Friday, September 6 |
8:30-10:00 [Hall 6] |
Keynote SPPI: Security and Availability in Mobile Service Development
Chairman: Manfred Reiterspiess
Modeling of Service Availability
Bart Kellerer and Jürgen Neises (Fujitsu Siemens Computer GmbH)
On the Development of an Open Standard for Highly Available Telecommunication Infrastructure Systems
Francis Tam (Nokia Research Center)
Strategic Technology Protection Programs
Gijs van Weyen (Microsoft) |
| 10:00-10:30 |
Coffee |
10:30-12:00 [Hall 1|2|3] |
S5: Component-Based RT and Embedded Systems
Chairman: Päivi Kallio |
S5: Process Improvement Practice and Experience
Chairman: Fritz Stallinger |
S5: Infrastructure for Multimedia Services
Chairman: Ana Pajares |
| 10:30 |
Component-Based Development of Networked Embedded Applications
P. Völgyesi and Á. Lédeczi |
SPiCE in Action - Experiences in Tailoring and Extension
A. Cass, C. Völcker, P. Sutter, A. Dorling and H. Stienen |
Scalable Processing and Communication Performance in a Multi-Media Related Context
J. Bjørndalen, O. Anshus, T. Larsen, L. Bongo and B. Vinter |
| 11:00 |
Canceled |
Software Development in Austria: Results of an Empirical Study among Small and Very Small Enterprises
C. Hofer |
Using a Multi-Layer Approach to Tackle the Service Interaction Problem in Telephony Scenarios
M. Görtz, R. Ackermann, M. Karsten and R. Steinmetz |
| 11:30 |
Towards an Impact Analysis for Component Based Real-Time Product Line Architectures
A. Wall, M. Larsson and C. Norström |
The Personal Software Process: Experiences from Denmark
P. Abrahamsson and K. Kautz |
Customer Choice in a Multi-Serice Residential Access Network Environment
E. Scharf. P. Hamer, K. Smparounis, W. Payer, J. Ronan and M. Crotty |
| 12:00-13:30 |
Lunch |
13:30-14:30 [Hall 6] |
Keynote2 MMT
Applying SMIL in Mobile Multimedia Environments
Dick Bulterman (Centrum voor Wiskunde en Informatica,
Multimedia and Human-Computer Interaction) |
| 14:30-14:45 |
Break |
14:45-16:15 [Hall 1|2|3] |
14:14-15:45, S6: Components and Formal Methods
Chairman: Kung-Kiu Lau |
S6: Human Dimension in SPPI
Chairman: Pekka Abrahamsson |
S6: Next Generation Internet Protocols
Chairman: Pál Halvorsen |
| 14:45 |
Appromimate Retrieval of Incomplete and Formal Specificatinos Applied to Horizontal Reuse
R. Redondo, J. Arias, A. Vilas and B. Martinez |
What has Culture to do with SPI?
K. Siakas |
Hierarchical Broadcasting in the Future Mobile Internet
C. Hesselman and H. Eertink |
| 15:15 |
The Evolutionary Approach to Semantics-Driven CBD Automation
Y. Jia, M. Tan and Y. Gu |
Using Human Resource Management Suites to Exploit Team Process Improvement Models
O. Türetken and Onur Demirörs |
IP Version 6 - An Analysis of the Long Way from Concept to Large Scale Deployment
J. Ottensmeyer |
| 15:45 |
Closing |
Soft Factors Impeding the Adoption of Process Models
G. Chroust |
Is Dynamic Multi-Rate Multicast Worthwhile the Effort?
I. Rimac, J. Schmitt and R. Steinmetz |
| Wednesday, September 4 |
| Time |
Track A |
Track B |
8:30-9:00 [Hall 6] |
Opening Session |
9:00-10:30 [Hall 6] |
Keynote1 MMT
DriveBy InfoFuelling - Telematics beyond the Anyime Anywhere Paradigm
Wieland Holfelder (Daimler Chrysler Research and Technology North America, Smart Vehicles Group) |
| 10:30-11:00 |
Coffee |
11:00-12:30 [Hall 4|5] |
S1: Processor and Memory Architectures |
S1: Partitioning and Decomposition |
| 11:00 |
An Asynchronous Victim Cache
D. Hormdee, J. Garside and S. Furber |
Recursive Bi-Partitioning of Netlists for Large Number of Partitions
R. Drechsler, W. Günther, T. Eschbach, L. Linhard and G. Angst |
| 11:30 |
Formal Verification of a DSP Chip Using an Iterative Approach
A. Hbibi, S. Tahar and A. Ghazel |
Folded Bit-Plane FIR Filter Architecture with Changeable Folding Factor
I. Milentijevic, V. Ciric, T. Tokic and O. Vojinovic |
| 12:00 |
Hardware Architecture for Java in a Hardware/Software Co-Design of the Virtual Machine
K. Kent and M. Serra |
Best Polarity for Low Power XOR Gate Decomposition
Y. Xia and A.E.A. Almaini |
| 12:15 |
Enhanced Configurable Parallel Memory Architecture
J. Vanne, E. Aho, K. Kuusilinna and T. Hämäläinen |
An Hybrid Evolutionary Algorithm for Multi-FPGA Systems Design
J. Hidalgo, J. Lanchares, A. Ibarra and R. Hermida |
| 12:30-14:00 |
Lunch |
14:00-15:30 [Hall 6] |
Keynote1 DSD
Systems Are Made from Transistors: UDSM Technology Creates New Challenges for Library and IC Development
Ulf Schlichtmann (Infineon)
System Design Challengers at Nokia
Klaus Kronlöf (Nokia) |
| 15:30-15:45 |
Break |
15:45-17:15 [Hall 4|5] |
S2: Special Architectures
Chairman: Eduard |
S2: System Specification and Modelling |
| 15:45 |
A Flexible Architecture for H.263 Video Coding
M. Garrido, C. Sanz, M. Jim é nes and J. Meneses |
Integrating a Computational Model and a Run Time System for Image processing on a UAV
P. Andersson, K. Kuchcinski, K. Nordberg and P. Doherty |
| 16:15 |
The Synthesis of a Hardware Schedules for Non-Manifest Loops
Omar Mansour, E. Molenkamp and T. Krol |
Specification and Simulation of Microprocessor Operations and Parallel Instructions
L. Feijs, P. Gorissen and J. Trescher |
| 16:45 |
Configurable Memory Organisation for Communication Applications
J. Soininen, A. Pelkonen and J. Roivainen |
Rapid Prototyping of Mixed Hardware and Software Systems
M. Edwards and B. Fozard |
| 17:00 |
Enhanced Reliability fo SoC-based HW/SW Co-Design
M. Boden, J. Schneider, K. Feske and St. Rülke |
Integration of Instruction Set Simulators into SystemC High Level Models
I. Oussorov, W. Raab, U. Hachmann and A. Kravtsov |
| 17:15-17:45 |
Coffee |
17:45-19:45 [Hall 4|5] |
S3: Parallel Processor Architectures |
S3: Verification and Test |
| 17:45 |
Architecture Design of a Scalable Single-Chip Multi-Processor
B. Theelen and A. Verschueren |
Testability Improvements Based on the Combination of Analytical and Evolutionary Approaches at RT Level
J. Strnadel and Z. Kotásek |
| 18:15 |
Canceled |
Fault Latencies of Concurrent Checking FSMs
R. Goot, I. Levin and S. Ostanin |
| 18:45 |
Improving The Operation Autonomy of SIMD Processing Elements by using Guarded Instructions and Pseudo Branches
M. Anido, A. Paar and N. Bagherzadeh |
Using Format Tools to Study Compley Circuits Behavior
P. Amblard, F. Lagnier and M. Lévy |
| 19:00 |
|
Integrated Design and Test Generation under Internet Based Environment MOSCITO
A. Schneider, K. Diener, E. Ivask, R. Ubar, E. Gramatova, T. Hollstein, W. Kuzmicz and Z. Peng |
| 19:15 |
Implementation of a Streaming Execution Unit
D. Cheresiz, B. Juurlink, S. Vassiliadis and H. Wijshoff |
|
| Thursday, September 5 |
8:30-10:00 [Hall 6] |
Keynote2 DSD
Networks or Silicon: Blessing or Nightmare?
Paul Wielage (Philips Research)
Embedded Software: How To Make It Efficient?
Peter Marwedel (University of Dortmund) |
| 10:00-10:30 |
Coffee |
10:30-12:00 [Hall 4|5] |
S4: Filter and Arithmetic Circuits |
S4: Circuit Synthesis and Optimisation |
| 10:30 |
A Design for a Low-Power Digital Matched Filter Applicable to W-CDMA
S. Gotom, T. Yamada, N. Takayama, Y. Matsushita, Y. Harada and H. Yasuura |
Decision Diagrams Optimization using Copy Properties
D. Jankovic, R. Stankovic and R. Drechsler |
| 11:00 |
Analysis of the impact of Different Methods for Division/Square Root Computation in the Performance of a Superscalar Microprocessor
D. Piso, J. Piñeiro and J. Bruguera |
Use of the Autocorrelation Function in the Classification of Switching Functions
J. Rice and J. Muzio |
| 11:30 |
Canceled |
Optimization of Equational Specifications using Genetic Techniques
A. Ibarra, J. Mendías, J. Lanchares, J. Hidalgo and R. Hermida |
| 11:45 |
|
Synthesis of Multipurpose Reversible Logic Gates
P. Kerntopf |
| 12:00-13:30 |
Lunch |
13:30-15:00 [Hall 6] |
Keynote1 CBSE/SPPI
EC/IST Program Activities in Component Based Software Engineering
Jacques Bus (Head of Unit Technologies and Engineering for Software,
Systems and Services, DG Information Society, IST Programs, European Commision) |
| 15:00-15:15 |
Break |
15:15-16:45 [Hall 4|5] |
S5: Reconfigurable Computing Architectures
Lech Jozwiak |
S5: High Level Synthesis |
| 15:15 |
Performance of Remote FPGA-based Coprocessors for Image-Processing Applications
D. Benitez |
Efficient Verification of Scheduling, Allocation and Binding in High-Level Synthesis
J. Mendías, R. Hermida, M. Molina and O. Peñalba |
| 15:45 |
Improving mW/MHz Ratio in FPGAs Pipelined Designs
O. Cadenas and G. Megson |
An Efficient List-Based Scheduling Algorithm for High-Level Synthesis
A. Sllame and V. Drabek |
| 16:00 |
Design of an FPGA based Adaptive Neural Controller for Intelligent Robot Navigation
M. Azhar and K. Dimond |
|
| 16:15 |
Constand Coefficient Convolution Implemented in FPGAs
E. Jamro and K. Wiatr |
Source Code Transformation to Improve Conditional Hardware Reuse
O. Peñalba, J. Mendías and R. Hermida |
| 16:30 |
An Evaluation of an FPGA Run-Time Support System
P. Green, M. Vakondios and M. Edwards |
|
| 16:45-17:15 |
Coffee |
17:15-18:45 [Hall 3] |
Panel - Systems-on-Chip |
| 20:30-... |
Conference Dinner |
| Friday, September 6 |
8:30-10:00 [Hall 6] |
Keynote SPPI: Security and Availability in Mobile Service Development
Chairman: Manfred Reitenspiess
Modeling of Serice Availability
Bartholomäus Kellerer, Jürgen Neises (Fujitsu Siemens Computer GmbH)
On the Development of an Open Standard for Highly Available Telecommunication Infrastructure Systems
Francis Tam (Nokia Research Center)
Strategic Technology Protection Programs
Gijs van Weyen (Microsoft) |
| 10:00-10:30 |
Coffee |
10:30-12:00 [Hall 5] |
Poster Session |
|
Work Out of the Algorithm Based on A-mod for Detection Borderlines in Images Provided by the Intravascular
Ultrasound System (IVUS) with 64 Transducers
Z. Vujovic |
| |
Reachability Analysis for Formal Verification of SystemC
R. Drechsler and D. Große |
| |
Simplifying Instruction Issue Logic in Superscalar Processors
T. Sato and I. Arita |
| |
A Self-Timed Arithmetic Unit for Elliptic Curve Cryptography
M. Feldhofer, T. Trathnigg and B. Schnitzer |
| |
Low Power Strategy for a TFT Controller
G. Notarangelo, M. Gibilaro, G. Palumbo, F. Pappalardo and A. Pennisi |
| |
Hardware Implementation of a Memory Allocator
K. Jasrotia and J. Zhu |
| |
Evolutionary Algorithm for State Assignment of Finite State Machines
M. Chyzy and W. Kosinski |
| 12:00-13:30 |
Lunch |
13:30-14:30 [Hall 6] |
Keynote2 MMT
Applying SMIL in Mobile Multimedia Environments
Dick Bulterman (Centrum voor Wiskunde en Informatica, Multimedia and Human-Computer Interaction) |
| 14:30-14:45 |
Break |
14:45-15:45 [Hall 4|5] |
S6: Specification and Modelling |
S6: Synthesis and Algorithms |
| 14:45 |
Use of HDL Code Checkers to Support the IP Entrance check - a Requirement Analysis
R. Frevert, S. Rülke, T. Schäfer and F. Dresig |
Speeding Up Elliptic Cryptosystems Using a New Signed Binary Representation for Integers
R. Katti |
| 15:15 |
On the Fundamental Design Gap in Terabit Per Second Packet Switching
M. Verhappen, P. van der Putten and J. Voeten |
Bit-Level Allocation of Multiple-Precision Specifications
M. Molina, J. Mendías and R. Hermida |
15:45-16:15 [Hall 5] |
Closing Session |